Register key

Screenshots

Three windows cover most of a session: the capture with its fitted model, the computed gains with their margins, and the write-back dialog that puts the numbers into the controller. Drawn here from a real run on a flow loop; your plant data goes in the same places.

Flintloop – Capture PVOUT (setpoint step) K = 1.84 T = 42 s L = 7 sresidual 2.1% – fit ok
Capture window. The PV trace (dark) against the setpoint step (amber); the fitted K, T and L and the residual appear the moment the step settles. A residual over the threshold is called out so you do not tune a bad fit.
Flintloop – Gains Rule: lambda / IMC Kp = 1.12Ti = 42 sTd = 3.5 s λ (closed-loop) = 30 s Stability Gain margin 2.6× ✓Phase margin 52° ✓ within target
Gains panel. The chosen rule on the left, the resulting gains in the controller's convention, and on the right the gain and phase margin checked against your target with a plain tick or cross.
Write gains to controller Target: Modbus RTU, unit 3, HR 40021–40023 Kp 1.12 → 40021 Ti 42 → 40022 Td 3.5 → 40023 Convention: seconds per repeat Write Cancel read-back verifies
Write-back. Flintloop maps each gain to a register or node, shows exactly what it will send, and reads the value back after writing so a silent failure cannot hide.